IDTechEx Explores the Packaging Technologies Behind the World’s First 3D-Stacked CPO from Nvidia

Author: Yu-Han Chang, Principal Technology Analyst at IDTechEx

At GTC 2025, NVIDIA announced two new networking switch platforms – Spectrum-X Photonics and Quantum-X Photonics – based on Co-Packaged Optics (CPO) technology. Spectrum-X, targeting Ethernet-based architectures, will be released in 2026 and offers configurations ranging from 128 ports at 800 Gb/s to 2,048 ports at 200 Gb/s, with total bandwidth reaching 400 Tb/s. Quantum-X, supporting InfiniBand and scheduled for late 2025, uses 200 Gb/s SerDes and delivers up to 144 ports at 800 Gb/s. Both platforms incorporate TSMC’s 3D hybrid bonding technology for its CPO, and these will be the world’s first 3D-stacked silicon photonics engine. Both platforms are developed in collaboration with TSMC and its supply chain optics, fiber, and module partners, including Coherent, Lumentum, Corning, Foxconn, and ASE. The developments aim to address bandwidth scaling and energy efficiency in AI-centric data centers.

Why advanced semiconductor packaging is the key enabler for CPO

Traditional pluggable optical modules face limitations in signal loss and latency due to long electrical traces. In contrast, CPO brings optical modules much closer to the switching silicon. The success of CPO relies on advanced semiconductor packaging technologies that enable high-density integration of photonic and electronic ICs (PICs and EICs) and the seamless integration of optical modules with switch ASICs or XPUs. Various packaging methods are used to achieve this, including 2.5D interposers, Through-Silicon Vias (TSVs), fan-out wafer-level packaging (FOWLP), and, increasingly, 3D integration with hybrid bonding.

One of the leading innovations is Cu-Cu bumpless hybrid bonding, which allows for die-to-die interconnects with single-digit micrometer pitches, compared to conventional microbumps that operate at 40-50 μm pitch. This reduces parasitics and thermal resistance while improving bandwidth density and I/O scaling. TSVs offer additional benefits by enhancing power delivery and enabling vertical communication between stacked dies. However, these methods introduce complexity in manufacturing and require precise alignment, advanced materials, and thermal management solutions.

For deeper technical insights related to advanced semiconductor packaging technologies, IDTechEx offers a comprehensive portfolio of reports. “Advanced Semiconductor Packaging 2025-2035: Forecasts, Technologies, Applications” covers technology trends, market forecasts, and key players. “Co-Packaged Optics (CPO) 2025-2035: Technologies, Market, and Forecasts” focuses on CPO-specific packaging challenges and integration strategies. For materials and processes, “Materials and Processing for Advanced Semiconductor Packaging 2025-2035: Technologies, Players, Forecasts” examines innovations like 2.5D flows and Cu-Cu hybrid bonding, along with 10-year forecasts for organic dielectric modules.

TSMC’s 3D hybrid bonding technology and its role in Co-Packaged Optics

TSMC’s System-on-Integrated Chips (SoIC) technology forms the foundation of the 3D integration used in CPO for NVIDIA’s Spectrum-X and Quamtum-X. The SoIC-X variant – TSMC’s advanced bumpless hybrid bonding process – enables vertical stacking of logic dies, or heterogeneous components with sub-10 μm pitch interconnects, significantly reducing interconnect length, resistance, and latency.

Built on this technology, TSMC’s COUPE™ (Compact Universal Photonic Engine) platform stacks the EIC directly on top of the PIC, minimizing the electrical path between them. This configuration improves energy efficiency and lowers latency—two key requirements for optical interconnects in high-speed AI networks.

COUPE™ may also integrate Through-Silicon Vias (TSVs) to route power and signals vertically between layers. TSVs help reduce IR drop and inductance, supporting efficient power delivery and dense vertical communication. However, stacking active EICs on thermally sensitive PICs presents cooling challenges. Advanced thermal management solutions like liquid cooling, thermal vias, and heat spreaders are needed to mitigate this.

In NVIDIA’s implementation, both Spectrum-X and Quantum-X platforms adopt COUPE™, combining a 65 nm EIC with a PIC using TSMC’s SoIC-X technology. TSMC expects to complete the validation of COUPE with support for small form-factor connectors by 2025 and plans full integration into CoWoS packaging by 2026.

Looking ahead, future versions of the platform aim to support bandwidths of 6.4 Tb/s and eventually 12.8 Tb/s, by integrating optics directly into the switch or processor package—an essential evolution to meet the growing data demands of AI workloads, where conventional pluggable optics are hitting limits in power and density.

Co-Packaged Optics (CPO) market trajectory – a US$1.2 billion market on the horizon

The adoption of Co-Packaged Optics (CPO) is still in its early stages. Companies like NVIDIA and TSMC are advancing its development, supported by an evolving ecosystem of packaging and photonics suppliers. This integration of photonic and electronic components is expected to play an increasingly important role in addressing bandwidth and power challenges in future data center architectures.

According to IDTechEx, the CPO market is projected to exceed $1.2 billion by 2035, growing at a robust CAGR of 28.9% from 2025 to 2035. CPO network switches are expected to dominate revenue generation, driven by each switch potentially incorporating up to 16 CPO PICs. Optical interconnects for AI systems will constitute approximately 20% of the market, with each AI accelerator typically utilizing one optical interconnect PIC to meet increasing demands for high-speed data processing and communication in advanced computing applications.

IDTechEx’s independent report, “Co-Packaged Optics (CPO) 2025-2035: Technologies, Market, and Forecasts,” offers an extensive exploration into the latest advancements within co-packaged optics technology. The report delves deep into key technical innovations and packaging trends, comprehensively analyzing the entire value chain. It thoroughly evaluates the activities of major industry players and delivers detailed market forecasts, projecting how the adoption of CPO will reshape the landscape of future data center architecture.

Central to the report is the recognition of advanced semiconductor packaging as the cornerstone of co-packaged optics technology. IDTechEx places significant emphasis on understanding the potential roles that various semiconductor packaging technologies may play within the realm of CPO.

This report provides a comprehensive analysis of Co-Packaged Optics (CPO), encompassing various critical aspects:

• Market Dynamics: Examination of key players such as Nvidia, Broadcom, Cisco, Ranovus, and Intel, and the forces shaping the CPO landscape.
• Innovations in CPO Design: Exploration of advanced CPO designs and their implications for enhancing data center efficiency and shaping future architecture.
• Semiconductor Packaging Breakthroughs: Insight into the latest advancements in semiconductor packaging, including 2.5D and 3D technologies, and their role in enabling CPO innovation.
• Optical Engines: Analysis of the drivers behind CPO’s performance and efficiency advantages.
• CPO for AI Interconnects: Exploration of how optical I/O can address the limitations of copper connections in AI applications, improving efficiency, latency, and data rates.
• CPO for Switches: Assessment of the potential 25% efficiency gains in high-performance network switches through CPO integration.
• Challenges and Solutions: Critical review of obstacles to CPO adoption and strategies to overcome them.
• Future Analysis: Predictions and insights into the next generation of CPO and its anticipated impact on the industry.

The report is based on extensive research and interviews with industry experts. It provides valuable insights for anyone interested in gaining a strategic understanding of Co-Packaged Optics’ role in advancing the future of data center and AI technology.

Market Forecasts:

• 10-year Data Center Population Cumulative Forecast
• 10-year AI Accelerator Unit Shipments Forecast
• 10-year CPO Interconnect for AI (Optical I/O) Unit Shipments Forecast
• 10-year CPO Interconnect for AI (Optical I/O) Market Revenue Forecast
• 10-year CPO-enabled Network Switch Unit Shipments Forecast
• 10-year CPO-enabled Network Switch Market Revenue Forecast
• 10-year Total CPO Market Revenue

For more information on this report, including downloadable sample pages, please visit www.IDTechEx.com/CPO.

For the full portfolio of semiconductor research available from IDTechEx please visit www.IDTechEx.com/Research/Semiconductors.